In the manufacture of semiconductor devices, a variety of conductive device regions and layers are formed on a device substrate. Photolithography is employed to define patterns making up device regions in the various layers. A lithographic system consists of a radiation source, a resist-coated sample and an image control system that regulates which part of the sample is illuminated by the radiation and which is not, according to a pattern. Selected portions of the resist are exposed by irradiating them with light of a selected wavelength. Depending on the type of resist, the exposed (positive tone process) or the unexposed (negative tone process) resist can be removed selectively by a developing process. The pattern is then inscribed into the resists and can be transferred to the sample by a subsequent process step, e.g., an etching step.
A photoresist patterned over a layer and the regions bared upon exposure are typically removed by an etch such as a plasma etch or ion bombardment. However, the resist mask also may degrade during the plasma etch of the underlying material, reducing resolution of the image patterned into the dielectric layer. Such imperfect image transfer compromises the performance of the semiconductor device.
Certain inorganic materials known as hard masks have been interposed between dielectric and resist layers to reduce imperfections in image transfer from the resist layer to the underlying dielectric layer. The hard mask material, e.g. silicon dioxide, may be deposited via chemical vapor deposition (CVD) using organic precursors such as silane or tetra-ethyl-ortho-silane (TEOS) and oxygen. A photoresist is then coated and imaged over the hard mask. The inorganic hard mask regions bared upon resist development are removed by a plasma etch to which the organic resist layer is resistant. Relatively high etch selectivity can be achieved between the inorganic hard mask layer and the overcoated patterned organic-based resist.
Upon such etching, the hard mask profile matches the resist mask. Regions exposed upon hard mask etching such as polysilicon now can be removed by an etchant for which the hard mask is resistant. The hard mask can then be removed by a separate etchant. Because high etch selectivity can be realized between the underlying layer material (such as polysilicon) and the hard mask, image transfer imperfections as discussed above can be avoided. See generally U.S. Pat. Nos. 6,890,448, 5,468,342, and 5,346,586.
One problem encountered in the conventional removal of hard masks made of silicon dioxide is that etchants such as hydrofluoric acid (HF) remove not only the silicon dioxide hard mask, but also tend to remove exposed portions of high-density plasma (HDP) field isolation silicon dioxide between adjacent transistors. This is because the etch rates for the hard mask oxide and the field oxide are comparable. Removing portions of the HDP field oxides undesirably reduces the isolation between the transistors. What is needed therefore is a method of forming and removing silicon dioxide hard masks that minimizes the undesirable removal of field isolation oxides, by maximizing the difference in etch rates between the hard mask oxides and the HDP field oxides.